תמונת באנר של הטכניון תמונת באנר של הטכניון

Senior Physical Design Engineer

Cisco is looking for a C++ Software Developer to join our Physical Design team within Cisco Silicon One, responsible for the entire backend methodology and flow development from RTL to GDS.
This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including:

  • Definition
  • Physical Synthesis
  • Place and Route
  • Optimization
  • Timing Closure
  • Design Floor Planning

We leverage the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

Minimum Requirements:

  • A VLSI Design Engineer with extensive experience in backend design
  • B.Sc./M.Sc. in Electrical Engineering
  • Strong understanding of Place & Route flow

Preferred / Advantageous Qualifications:

  • Deep understanding of all aspects of Physical construction and Integration
  • Knowledge in Physical Design Verification methodology LVS/DRC
  • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)
  • Great teammate, self-learning skills, and ability to work autonomously

 Full-time position